`define HSE_VALUE 32'd12_000_000
module usb (
  PIN_HSE,
  PIN_HSI,
  PIN_OSC,
  test_pin,
  led_pin,
);
input wire PIN_HSE;
input wire PIN_HSI;
input wire PIN_OSC;
output wire[31:0] test_pin;
output wire led_pin;

wire [4:0] PLL_CLKOUT;
wire       sys_resetn;
wire       sys_ctrl_stop;
wire [1:0] sys_ctrl_clkSource;
wire       PLL_ENABLE;
wire       PLL_LOCK;

alta_pllve pll_inst (
  .clkin(PIN_HSE),
  .pfden(1'b1),
  .resetn(PLL_ENABLE),
  .phasecounterselect(3'b0),
  .phaseupdown(1'b0),
  .phasestep(1'b0),
  .scanclk(1'b0),
  .scanclkena(1'b0),
  .scandata(1'b0),
  .configupdate(1'b0),
  .clkfb(pll_clkfb),
  .clkfbout(pll_clkfb),
  .clkout0(PLL_CLKOUT[0]),
  .clkout1(PLL_CLKOUT[1]),
  .clkout2(PLL_CLKOUT[2]),
  .clkout3(PLL_CLKOUT[3]),
  .clkout4(PLL_CLKOUT[4]),
  .lock   (PLL_LOCK));
defparam pll_inst.CLKIN_FREQ      = "12.0";
defparam pll_inst.CLKIN_HIGH      = 8'd0;
defparam pll_inst.CLKIN_LOW       = 8'd1;
defparam pll_inst.CLKIN_TRIM      = 1'b1;
defparam pll_inst.CLKIN_BYPASS    = 1'b0;
defparam pll_inst.CLKFB_HIGH      = 8'd59;
defparam pll_inst.CLKFB_LOW       = 8'd59;
defparam pll_inst.CLKFB_TRIM      = 1'b0;
defparam pll_inst.CLKFB_BYPASS    = 1'b0;
defparam pll_inst.CLKDIV0_EN      = 1'b1;
defparam pll_inst.CLKDIV1_EN      = 1'b1;
defparam pll_inst.CLKDIV2_EN      = 1'b0;
defparam pll_inst.CLKDIV3_EN      = 1'b0;
defparam pll_inst.CLKDIV4_EN      = 1'b0;
defparam pll_inst.CLKDIV4_EN      = 1'b0;
defparam pll_inst.CLKOUT0_HIGH    = 8'd0;
defparam pll_inst.CLKOUT0_LOW     = 8'd1;
defparam pll_inst.CLKOUT0_TRIM    = 1'b1;
defparam pll_inst.CLKOUT0_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT0_DEL     = 8'd0;
defparam pll_inst.CLKOUT0_PHASE   = 3'd0;
defparam pll_inst.CLKOUT1_HIGH    = 8'd3;
defparam pll_inst.CLKOUT1_LOW     = 8'd3;
defparam pll_inst.CLKOUT1_TRIM    = 1'b0;
defparam pll_inst.CLKOUT1_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT1_DEL     = 8'd0;
defparam pll_inst.CLKOUT1_PHASE   = 3'd0;
defparam pll_inst.CLKOUT2_HIGH    = 8'd255;
defparam pll_inst.CLKOUT2_LOW     = 8'd255;
defparam pll_inst.CLKOUT2_TRIM    = 1'b0;
defparam pll_inst.CLKOUT2_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT2_DEL     = 8'd0;
defparam pll_inst.CLKOUT2_PHASE   = 3'd0;
defparam pll_inst.CLKOUT3_HIGH    = 8'd255;
defparam pll_inst.CLKOUT3_LOW     = 8'd255;
defparam pll_inst.CLKOUT3_TRIM    = 1'b0;
defparam pll_inst.CLKOUT3_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT3_DEL     = 8'd0;
defparam pll_inst.CLKOUT3_PHASE   = 3'd0;
defparam pll_inst.CLKOUT4_HIGH    = 8'd255;
defparam pll_inst.CLKOUT4_LOW     = 8'd255;
defparam pll_inst.CLKOUT4_TRIM    = 1'b0;
defparam pll_inst.CLKOUT4_BYPASS  = 1'b0;
defparam pll_inst.CLKOUT4_DEL     = 8'd0;
defparam pll_inst.CLKOUT4_PHASE   = 3'd0;
defparam pll_inst.FEEDBACK_MODE   = 3'b100;
defparam pll_inst.FBDELAY_VAL     = 3'b100;
defparam pll_inst.VCO_POST_DIV    = 1'b1;


assign test_pin[1] = oreg;
assign test_pin[2] = sys_gck;
assign test_pin[3] = PIN_HSE;

wire sys_gck;
assign bus_clk = sys_gck;

def_clk _clk(PLL_CLKOUT[1],clk_out1);

reg oreg = 1'b0;
always @(posedge clk_out1) begin
    oreg <= !oreg;
end
assign usb0_xcvr_clk = clk_out1;

// Location: BBOX_X22_Y4_N0 FIXED_COORD
alta_gclksw gclksw_inst (
    .resetn(sys_resetn),
    .ena   (!sys_ctrl_stop),
    .clkin0(PIN_HSI_in),
    .clkin1(PIN_HSE_in),
    .clkin2(PLL_CLKOUT[0]),
    .clkin3(),
    .select(sys_ctrl_clkSource),
    .clkout(sys_clk));

(* keep *) alta_gclkgen gclksw_gen (
    .clkin (sys_clk),
    .ena   (!sys_ctrl_stop),
    .clkout(sys_gck0));

// Location: CLKCTRL_G5 FIXED_COORD
(* keep *) alta_io_gclk gclksw_gclk (
    .inclk (sys_gck0),
    .outclk(sys_gck));

  def_clk _clk2(PIN_HSI,clk_out);

  reg [31:0] counter = 32'd0;
  reg led_reg = 0;
  assign led_pin = led_reg;
  always @(posedge clk_out) begin
      //需要0.5s切换一次电平
      if({counter,1'b0}==`HSE_VALUE)begin
          led_reg <= !led_reg;
          counter <= 32'd0;
      end
      else
          counter <= counter + 32'd1;
  end

alta_rv32 rv32(
  .sys_clk            (sys_clk                                         ),
  .sys_ctrl_pllEnable (PLL_ENABLE                                      ),
  .sys_ctrl_pllReady  (PLL_LOCK                                        ),
  .sys_ctrl_clkSource (sys_ctrl_clkSource                              ),
  .sys_ctrl_stop      (sys_ctrl_stop                                   ),
  .sys_ctrl_standby(sys_ctrl_standby),
  .resetn_out         (sys_resetn                                      ),

  .sys_ctrl_sleep(sys_ctrl_sleep),
  .ext_resetn         (1'b1                                            ),
  .test_mode          (2'b0                                            ),
  .usb0_xcvr_clk      (usb0_xcvr_clk                                   ),
  .usb0_id            (1'b1                                            ),

  .ext_int            ({1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0}),
  .local_int (4'b0)
);

endmodule

